Part Number Hot Search : 
10A05 N5821 DTC113 30KP10A SP8808 LC7536R LC7560 B1203
Product Description
Full Text Search
 

To Download CS19203CBI20 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  final/production release information - the information contained in this document is about a product in its fully tested and characterized phase. all fea- tures described herein are supported. contact amcc for updates to this docu- ment and the latest product status. empowering intelligent optical networks product brief hudson 2.0 variable rate digital wrapper framer/deframer, pm, and fec device part number s19203cbi20, revision 1.3, may 2003  core logic runs on a 1.8 v power supply to reduce power con- sumption and lvcmos i/o are 3.3 v compatible.  two independent 16-bit parallel lvds input and output ports at up to 693.483 mhz (11.096 gbps).  datapath options: configurable as two completely independent data stream for full duplex operation. configurable as a single data stream for regenerator operation with dual redundant i/o for optional protection switching. either input port can be directly connected to either output port for loopback testing or bypass operation.  supports sonet oc-192 performance monitoring at the input of the encoder side and at the output of the decoder side.  supports g.709 ?interfaces for the optical transport network (otn)? standard including specified frame structure, all overhead monitoring and processing, maintenance signals, synchronous and asynchronous mapping and demapping.  on/off control of reed-solomon (255,239) fec encoding/ decoding and error correction.  support for system test and diagnostics: internal ber generator, prbs pattern generator and pattern analyzer for bit error rate testing capability.  four programmable integer clock dividers to simplify clock gener- ation.  support for signal aggregation to higher rates via chip synchroni- zation feature.  general purpose processor interface: gluess interface to mpc860, 25 mhz to 50 mhz bus speed. also compatible with intel microprocessor bus via busmode selector.  low power: 0.18 micron cmos technology. applications  10 gigabit digital wrapper performance monitor and framer  protocol independent dwdm metropolitan area networks  optical cross-connects  oc-192 port interface  fiber optic terminators, repeaters, and test equipment the hudson is a fully integrated, variable rate digital wrapper framer/deframer, performance monitor, and forward error correct ion (fec) device supporting the digital wrapper transmission standards for otu1, otu2, odu1, odu2, opu1, and opu2 as specified in g.709. the hudson implements performance monitoring and overhead processing functions on the digital wrapper overhead bytes. in addition, the device contains sonet/sdh performance monitoring to verify the validity of the sonet/sdh oc-192 client data. the device can ope rate from a low rate of 6.25 mhz to a high rate of 693.483 mhz. data entering and leaving the chip can be optionally deframed and fr amed, descrambled and scrambled, and decoded and encoded with forward error correction information. figure 1: block diagram decodein[15:0] duplexout[15:0] dec oh mon/drop fec decoder dec 1:8 demux dupo ut 1:8 mux dec sonet pm decode (dec) side duptxclk_out decrxclk rate match fifo pattern analyzer enc 8:1 mux enc oh frame gen & fec encoder encdataout[15:0] enc oh add tx_oh_clk insfp inssfp tx_oh_data[7:0] tx_oh_ins dupin 1:8 demux duplexin[15:0] encode (enc) side enctxclk duprxclk rate match fifo pattern generator dup oh framer dec oh framer och descram & sc/oh mon/drop dec oh ins & scrambler dec_insclk dec_ins_fp dec_ins_sfp decins[7:0] dec_ins_en hudson 2.0 rx_oh_clk rx_oh_data[7:0] dropfp dropsfp enc_drpclk enc_drp[7:0] enc_drp_fp enc_drp_sfp clock divider decrxclk_div clock divider duprxclk_div clock divider enctxclk_div clock divider duptxclk_div enc sonet pm sync b uffer input_port_sw ap input_port_sw ap d ec _in_sel[1:0] pat_gen_on dup_out_sel[1:0] output_port_sw ap enc_in_sel enc_o ut_sel[1:0] output_port_sw ap 0 1 1 0 00 10 01 01 01, 11 00 11 00 10 10 00, 01 10 00 01 0 0 1 1 0 0 1 1 00,10
2 empowering intelligent optical networks product brief hudson 2.0 variable rate digital wrapper framer/deframer, pm, and fec device part number s19203cbi20, revision 1.3, may 2003 general description operating frequencies digital wrapper functionality is available on the hudson without regard to the actual data rate. the table below shows the supported frequencies of operation for digital wrapper transponder and sonet/sdh monitoring applications. note that sonet/sdh moni- toring is only supported for the oc-192 rate. typical full duplex application in the full-duplex configuration, the encode side and decode side of the hudson can operate independently as shown below. at the input to the encode side of the hudson is a sonet monitor which can verify the integrity of the sonet data stream prior to wrapping and fec. at the output of the decode side, another sonet monitor exists after decoding and deframing, to verify the integrity of the wrapper's sonet payload before it exits the hudson. wrapper overhead insertion and extraction, encoding and decoding, and per- formance monitoring are carried out on the output and input data streams respectively. the hudson also contains many features to help the user with device integration and line testing. the hudson high speed i/o is also compatible with the amcc sonet/sdh mapper or interleaver/disinterleaver. a typical edge application is shown below. typical single-line application the following figures also illustrate a typical network application for the hudson supporting a single data stream with dual redundant input and output lines. this configuration is useful for core transpon- der applications where it is desired to correct errors and do perfor- mance monitoring and output a corrected and fec encoded data stream with or without new optical channel overhead (digital wrapper oh) bytes. data is received from the fiber and passed through a clock/data recovery device (cdr) and a demultiplexer device to the hudson. the hudson optionally carries out sonet/ sdh monitoring, digital wrapper performance monitoring, error checking, and overhead data extraction and insertion. detected errors and accumulated error counts can be accessed by the user either through a processor interface, an fpga interface, or in a number of cases, from i/o pins. the data stream is then transmitted out onto the fiber via a high-speed multiplexer and an optics device. fec decoding and encoding may be disabled individually. mode frequency (data rate) digital wrapper 6.25 mhz (100 mbps) to 693.483 mhz (11.096 gbps) 1 1. note: g.709 specifies exact rates for the digital wrap- per. at the otu2 rate, the frequency of the hudson data ports is 669.33 mhz. the hudson can be safely run at lower rates than specified in g.709 if compatibility to the standard is not required. sonet/ sdh moni- toring 622.08 mhz (9.95 gbps) only figure 2: full-duplex configuration figure 3: typical edge application ring with no fec coding otx demux (s3092) mux (s3091) decoder encoder mux (s3091) demux (s3092) orx fec coded ring s19203 orx otx s 19202 / s 19201 dec enc fpg a u pro cesso r s3092 s3091 s 19203 g a n g e s / in d u s optics m odule c o n n e c t o r
empowering intelligent optical networks 3 product brief hudson 2.0 variable rate digital wrapper framer/deframer, pm, and fec device part number s19203cbi20, revision 1.3, may 2003 amcc reserves the right to make changes to its products, or to discontinue any product or service without notice, and advises i ts customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied upon is c urrent. amcc is a registered trademark of applied micro circuits corporation. copyright ? 2002 applied micro circuits corporation. all rights reserved. 200 minuteman road  andover, ma 01810  tel: 978-247-8000  fax: 978-623-0024  http:// www.amcc.comnical support, please call 800 840-6055 or email productsupport@amcc.com figure 4: dual-redundant, singlelline configuration figure 5: se;f-healing blsr fec encoded network orx cdr and demux (amcc s3092) otx primary primary decoder s19203 mux (amcc s3091) orx cdr and demux (amcc s3092) spare otx spare mux (amcc s3091) encoder dec enc s3092 enc dec from network to network s19203 s19203 to network from network s3091 s3091 s3092 decode in decode in duplex in duplex in duplex out encode out encode out duplex out


▲Up To Search▲   

 
Price & Availability of CS19203CBI20

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X